Description

The original 8052 had a 12-clock structure, one machine cycle required 12 clocks, and most instructions were one or two machine cycles. Thus, in addition to the multiplication and division instructions, each instruction of the 8052 uses 12 or 24 clocks, and in addition, each cycle in the 8052 uses two memory retrievals. In many cases, the second one is a fake extraction, and the extra clock is wasted.

The OB6610 is a fast monolithic 8-bit microcontroller core. This is a full-featured 8-bit embedded controller that executes all ASM51 instructions with the same instruction settings as the MCS-51.

Features

Operating voltage: 1.8V ~ 5.5V

High-speed 1T architecture up to 25MHz

Command settings are MCS-51 compatible

Built-in 22.1184MHz RC oscillator and programmable frequency divider

16KB bytes of on-chip flash program memory.

256B bytes of standard 8052 RAM plus 1K bytes of on-chip expansion SRAM.

Dual 16-bit data pointers (DPTR0&DPTR1).

A full-duplex serial interface (UART) that includes:

In synchronous mode, the baud rate is fixed and there is only one serial interface 0. In synchronous mode, the baud rate is fixed and there is only one serial interface 0.

8-bit UART mode with variable baud rate.

In 9-bit UART mode, the baud rate is fixed and there is only one serial interface 0.

9-bit UART mode with variable baud rate.

Additional baud rate generator.

Three 16-bit timers/counters (timers 0,1,2)

Programmable Watchdog Timer (WDT)

One IIC interface (master/slave mode)

One SPI interface (master/slave mode).

Specific PWM interrupts are automatically triggered

8-channel 14-bit PWM

4-way 16-bit compare/capture/reload function

The internal comparator output can be a CCU input source

The noise filter can be selected by CCU input and sampling frequency

8 x 10bit analog-to-digital conversion (ADC).

3 Built-in comparators on the chip

On-chip flash memory supports ISP/IAP/ICP and EEPROM functions

On-chip Simulation (ICE) and On-Ch